JPS6032343A - パワ−半導体モジユ−ル基板 - Google Patents

パワ−半導体モジユ−ル基板

Info

Publication number
JPS6032343A
JPS6032343A JP14131983A JP14131983A JPS6032343A JP S6032343 A JPS6032343 A JP S6032343A JP 14131983 A JP14131983 A JP 14131983A JP 14131983 A JP14131983 A JP 14131983A JP S6032343 A JPS6032343 A JP S6032343A
Authority
JP
Japan
Prior art keywords
plate
power semiconductor
semiconductor module
module substrate
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14131983A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0586662B2 (en]
Inventor
Masako Nakabashi
中橋 昌子
Kazumi Shimotori
霜鳥 一三
Hiromitsu Takeda
博光 竹田
Tatsuo Yamazaki
山崎 達雄
Makoto Shirokane
白兼 誠
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP14131983A priority Critical patent/JPS6032343A/ja
Publication of JPS6032343A publication Critical patent/JPS6032343A/ja
Publication of JPH0586662B2 publication Critical patent/JPH0586662B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/15Ceramic or glass substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3731Ceramic materials or glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0104Zirconium [Zr]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Materials Engineering (AREA)
  • Ceramic Products (AREA)
  • Die Bonding (AREA)
JP14131983A 1983-08-02 1983-08-02 パワ−半導体モジユ−ル基板 Granted JPS6032343A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14131983A JPS6032343A (ja) 1983-08-02 1983-08-02 パワ−半導体モジユ−ル基板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14131983A JPS6032343A (ja) 1983-08-02 1983-08-02 パワ−半導体モジユ−ル基板

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP6300702A Division JP2519402B2 (ja) 1994-12-05 1994-12-05 パワ―半導体モジュ―ル基板の製造方法

Publications (2)

Publication Number Publication Date
JPS6032343A true JPS6032343A (ja) 1985-02-19
JPH0586662B2 JPH0586662B2 (en]) 1993-12-13

Family

ID=15289145

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14131983A Granted JPS6032343A (ja) 1983-08-02 1983-08-02 パワ−半導体モジユ−ル基板

Country Status (1)

Country Link
JP (1) JPS6032343A (en])

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6342153A (ja) * 1986-08-07 1988-02-23 Showa Denko Kk 混成集積回路基板及びその製造方法
JPS6342152A (ja) * 1986-08-07 1988-02-23 Showa Denko Kk 混成集積回路基板及びその製造方法
EP0190820A3 (en) * 1985-02-01 1988-08-10 Tektronix, Inc. Zirconium thin-film metal conductor systems
US4919731A (en) * 1987-02-10 1990-04-24 Kabushiki Kaisha Toshiba Brazing paste
JPH0497966A (ja) * 1990-08-09 1992-03-30 Ngk Spark Plug Co Ltd セラミック摺動部品の製造方法
US5176309A (en) * 1990-05-25 1993-01-05 Kabushiki Kaisha Toshiba Method of manufacturing circuit board
EP0788153A2 (en) 1996-02-05 1997-08-06 Sumitomo Electric Industries, Ltd. Member for semiconductor device using an aluminum nitride substrate material, and method of manufacturing the same
JP2000086368A (ja) * 1998-09-16 2000-03-28 Fuji Electric Co Ltd 窒化物セラミックス基板
JP2000335983A (ja) * 1999-05-28 2000-12-05 Denki Kagaku Kogyo Kk 接合体の製造方法
US6261703B1 (en) 1997-05-26 2001-07-17 Sumitomo Electric Industries, Ltd. Copper circuit junction substrate and method of producing the same

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5175972A (en) * 1974-12-26 1976-06-30 Ngk Insulators Ltd Seramitsukuno metaraijinguhoho
JPS53102310A (en) * 1977-02-18 1978-09-06 Tokyo Shibaura Electric Co Heat conducting base plates
JPS56163093A (en) * 1980-04-21 1981-12-15 Bbc Brown Boveri & Cie Activated wax and manufacture of thin sheet consisting of said wax
JPS5848926A (ja) * 1981-09-18 1983-03-23 Hitachi Ltd 絶縁型半導体装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5175972A (en) * 1974-12-26 1976-06-30 Ngk Insulators Ltd Seramitsukuno metaraijinguhoho
JPS53102310A (en) * 1977-02-18 1978-09-06 Tokyo Shibaura Electric Co Heat conducting base plates
JPS56163093A (en) * 1980-04-21 1981-12-15 Bbc Brown Boveri & Cie Activated wax and manufacture of thin sheet consisting of said wax
JPS5848926A (ja) * 1981-09-18 1983-03-23 Hitachi Ltd 絶縁型半導体装置

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0190820A3 (en) * 1985-02-01 1988-08-10 Tektronix, Inc. Zirconium thin-film metal conductor systems
JPS6342153A (ja) * 1986-08-07 1988-02-23 Showa Denko Kk 混成集積回路基板及びその製造方法
JPS6342152A (ja) * 1986-08-07 1988-02-23 Showa Denko Kk 混成集積回路基板及びその製造方法
US4919731A (en) * 1987-02-10 1990-04-24 Kabushiki Kaisha Toshiba Brazing paste
US5280850A (en) * 1990-05-25 1994-01-25 Kabushiki Kaisha Toshiba Method of manufacturing circuit board
US5176309A (en) * 1990-05-25 1993-01-05 Kabushiki Kaisha Toshiba Method of manufacturing circuit board
DE4117004B4 (de) * 1990-05-25 2005-08-11 Kabushiki Kaisha Toshiba, Kawasaki Verfahren zur Herstellung einer Schaltungsplatte
JPH0497966A (ja) * 1990-08-09 1992-03-30 Ngk Spark Plug Co Ltd セラミック摺動部品の製造方法
EP0788153A2 (en) 1996-02-05 1997-08-06 Sumitomo Electric Industries, Ltd. Member for semiconductor device using an aluminum nitride substrate material, and method of manufacturing the same
US5998043A (en) * 1996-02-05 1999-12-07 Sumitomo Electric Industries, Ltd. Member for semiconductor device using an aluminum nitride substrate material, and method of manufacturing the same
US6261703B1 (en) 1997-05-26 2001-07-17 Sumitomo Electric Industries, Ltd. Copper circuit junction substrate and method of producing the same
JP2000086368A (ja) * 1998-09-16 2000-03-28 Fuji Electric Co Ltd 窒化物セラミックス基板
JP2000335983A (ja) * 1999-05-28 2000-12-05 Denki Kagaku Kogyo Kk 接合体の製造方法

Also Published As

Publication number Publication date
JPH0586662B2 (en]) 1993-12-13

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